Huwan Peng — HwP: Hardware Programmer
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Ph.D. Student hwpeng at uw dot edu |
About
I am a PhD student in the ECE department at University of Washington. I work with Prof. Michael Taylor and Prof. Richard Shi.
I am broadly interested in computer architecture, VLSI, and deep learning, particularly for the purpose of designing and implementing specialized hardware for emerging application domains.
I am passionate about open-source hardware.
Before coming to UW, I received my bachelor's degree in the School of Microelectronics from Shanghai Jiao Tong University in 2016. I also interned at Microsoft and Fudan Univerisity.
I enjoy running and hiking (strava).
Some stories (in Chinese):
Publications
Working Papers
Chiplet Cloud: Building AI Supercomputers for Serving Large Generative Language Models
Huwan Peng, Scott Davidson, Richard Shi, Shuaiwen Leon Song, Michael Taylor
arXiv
Conference Papers
Q-VR: System-Level Design for Future Mobile Collaborative Virtual Reality
Chenhao Xie, Xie Li, Yang Hu, Huwan Peng, Michael Taylor, Shuaiwen Leon Song
ASPLOS 2021Exploring the Programmability for Deep Learning Processors: from Architecture to Tensorization
Chixiao Chen, Huwan Peng, Xindi Liu, Hongwei Ding, C.-J. Richard Shi
DAC 2018iFPNA: A Flexible and Efficient Deep Neural Network Accelerator with a Programmable Data Flow Engine in 28nm CMOS
Chixiao Chen, Xindi Liu, Huwan Peng, Hongwei Ding, C.-J. Richard Shi
ESSCIRC 2018OCEAN: An On-chip Incremental-Learning Enhanced Processor with Gated Recurrent Neural Network Accelerators
Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Rui Ma, Peiyong Zhang, Xiaolang Yan, Yu Wang, C.-J. Richard Shi
ESSCIRC 2017
Journal Papers
iFPNA: A Flexible and Efficient Deep Learning Processor in 28-nm CMOS Using a Domain-specific Instruction Set and Reconfigurable Fabric
Chixiao Chen, Xindi Liu, Huwan Peng, Hongwei Ding, C.-J. Richard Shi
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2019OCEAN: An On-chip Incremental-Learning Enhanced Artificial Neural Network Processor with Multiple Gated-Recurrent-Unit Accelerators
Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Yu Wang, C.-J. Richard Shi
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2018
Awards
Presentations/Posters
Chiplet Architecture for Large Language Models
ADA Annual Review, 2022End-to-End of Deep Reinforcement Learning Accelerator
ADA Liaison Meeting, 2021Accelerator Validation with Amazon F1
ADA Annual Review, 2019Exploring the Energy Efficient Dataflow for Deep Neural Network Accelerators
ADA Annual Review, 2018iFPNA: an Instruction-and-Fabric Programmable Neuron Array
ISSCC Student Research Preview, 2018